Liquid crystal display (LCD) or organic light-emitting diode (OLED) has advantages of low radiation, small volume, low power consumption and the like, and has gradually replaced the conventional cathode ray tube display (CRT) to be widely used in information products such as notebook computers, personal digital assistants (PDA), flat television sets, and mobile phones, etc. The conventional liquid crystal display adopts external driving chips to drive chips on a panel to display an image. In order to reduce the number of elements and reduce manufacture cost, there is an increasing trend that the structure of a driving circuit has been produced directly on a display panel in recent years, for example, a technology of integrating a gate driver on a liquid crystal panel, that is, Gate on Array (GOA), has been adopted.
At present, a common shift register unit is as shown in FIG. 1, and comprises transistors T1, T2, T3 and T4, a capacitor C1 and a pull-down circuit 11. Assuming that the shift register unit as shown in FIG. 1 is an Nth stage of shift register unit, the transistor T1 has a gate configured to receive a signal output from an (N−1)th stage of shift register unit, a source configured to receive a VDD signal, and a drain connected to a gate of the transistor T2; the transistor T2 has a source configured to receive a clock signal CLK and a drain configured as an output terminal of the Nth stage of shift register unit; the capacitor C1 has one terminal connected to the gate of the transistor T2 and the other terminal connected to the drain of the transistor T2; the transistor T3 has a source connected to the gate of the transistor T2, a gate configured to receive a signal output from an (N+1)th stage of shift register unit, and a drain configured to receive a VSS signal; the transistor T4 has a source connected to the drain of the transistor T2, a gate configured to receive a signal output from an (N+1)th stage of shift register unit, and a drain configured to receive a VSS signal; the pull-down circuit 11 is connected to the gate and the drain of the transistor T2.
When the transistor T1 is turned on by a high level signal output from the (N−1)th stage of shift register unit, a scan gate line connected to the Nth stage of shift register unit is activated, the transistor T2 is turned on since the gate of the transistor T2 receives the VDD signal, and thus the Nth stage of shift register unit outputs the CLK signal, at this time, the Nth stage of shift register unit outputs a low level signal since the CLK signal is the low level signal. When the CLK signal changes to the high level signal, the (N−1)th stage of shift register unit outputs the low level signal and thus the transistor T1 is turned off, but the transistor T2 is kept to be turned on due to the charge storage function of the capacitor C1, such that the Nth stage of shift register unit outputs the high level signal and thus a scan gate line connected to the (N+1)th stage of shift register unit is activated, the scan gate line connected to the Nth stage of shift register unit is charged through the transistor T2 so as to increase the voltage on the scan gate line connected to the Nth stage of shift register unit; when the Nth stage of shift register unit receives the high level signal output from the (N+1)th stage of shift register unit, the transistor T3 is turned on such that the gate of the transistor T2 receives the VSS signal and thus the transistor T2 is turned off, the gate line connected to the Nth stage of shift register unit is discharged through the transistor T4 so as to decrease the voltage on the gate line connected to the Nth stage of shift register unit. At this time, the gate line connected to the Nth stage of shift register unit is not activated any longer, and thus the function that the gate lines connected to the respective stages of shift register units respectively are activated sequentially is achieved. Thereafter, the pull-down circuit 11 is used to make the Nth stage of shift register unit output a stable voltage.
In the circuit as shown in FIG. 1, the transistor T2 configured to pull-up the gate line corresponding to the shift register unit and the transistor T4 configured to pull-down the gate line corresponding to the shift register unit are designed separately, since these two transistors T2 and T4 are used to charge or discharge a whole gate line, the sizes of these two transistors T2 and T4 are much larger than those of other transistors in the shift register unit, that is, such a shift register unit occupies a large area, such that the area of the glass substrate as required is large when producing a same number of shift register units thereon, which causes a large consumption of materials such as glass substrate and the like, a high cost for manufacturing such a shift register unit, and a high cost for manufacturing a display device comprising such a shift register unit.
To sum up, since the transistors configured to pull-up or pull-down the gate line connected to the conventional shift register unit are designed separately when the conventional shift register unit charges or discharges the gate line connected thereto, and since the sizes of these two transistors are much larger than those of other transistors in the shift register unit, such a shift register unit occupies a large area, such that the area of the glass substrate carrying such a shift register unit is large, which causes a large consumption of materials, a high cost for manufacturing such a shift register unit, and a high cost for manufacturing a display device comprising such a shift register unit.